With the ongoing rise in SoC complexity and process node intricacy, dependable IP partners are more valuable than ever before. Learn how reliable, high performance Cadence IP can reduce schedule risk and accelerate time to [More]
Demonstration of IP and DRAM implementing a preliminary version of the DDR5 interface standard being developed by JEDEC. Find more great content from Cadence: Subscribe to our YouTube channel: https://www.youtube.com/channel/UC5qqAsDzbA0zAQNBBQVsS0Q Connect with Cadence: Website: http://www.cadence.com [More]
Ulf Ewaldsson, Sr Vice President & CTO at Ericsson, talks about the enormous challenges to produce a system to fulfill the highest requirements for the future of IoT connectivity. While the company is ready to [More]
Watch Megha Daga, director of AI marketing, IPG, discuss the features and benefits of the stand-alone DNA 100 AI processor as well as the automated software tools, in this interview by elecfans.com at the China [More]
Paul Cunningham, CVP and GM, System & Verification Group, Cadence, talks about his personal vision board and the exciting innovations he sees in the ‘Electronics Age’ as well as Cadence’s contributions to these developments. Find [More]
Cadence has been closely collaborating with the University of Nagoya on AUTOWARE an open source software for highly automated driving. A vehicle was equipped with Lidar, IMU, GNSS, cameras, high-definition digital maps and a high-performance [More]
Stuart Riches from Arm, gives a short review of the challenges faced in 1999 when the first ASIC revolution began and how it led the way to addressing emerging markets especially in the mobile industry. [More]
– Set design-level constraints ​ – Set environmental constraints ​ – Set the wire-load models for net delay calculation ​ – Constrain a clock for slew, latency, and uncertainty ​ – Analyze a timing report [More]
In this video, you will learn the variety of ways to launch Cadence help and search for items on Cadence Online Support. University students interested in accessing Cadence Online Support can contact universityprogram@cadence.com. Find more [More]
The growing automotive and IoT markets demand high performance and reliability, making aging a critical consideration for design engineers. GlobalFoundries’ Siddharth Sawant shares insights on the aging mechanisms and best approach to achieve highly accurate [More]
In this video, Crystle Bruno explains the Cadence Cloud offerings which include the Cloud-Hosted Design Solution, Cloud Passport, and Palladium Cloud. These offerings enable both large and small companies to reap the productivity benefits of [More]
IoT and wearable designs often require big DSP processing power on a tiny energy budget. But, conventional processors are not well suited to these kinds of applications. In this episode of Chalk Talk, Amelia Dalton [More]
At embedded world 2017, Frank Schirrmeister, Cadence, discusses the key challenges to develop devices for the IoT – from edge note through hubs to networking, cloud and servers – and how prototyping and emulation can [More]
ARM and Cadence provide an IoT IP Reference Subsystem and an FPGA development environment for rapid IoT system prototyping. The FPGA can be loaded with additional IP to enable different features on the board and [More]
Find out from Nuvia leaders Manu Gulati and Syrus Ziai how designing with Cadence helps them achieve their mission to reimagine silicon design to create a new class of server processor. Find more great content [More]
I had a brief encounter with Cadence’s Krishna Balachandran, who is responsible for low-power products. As you can see in the video, I handled the toughest part of the interview — pronouncing Krishna’s last name [More]
Tired of struggling with pairing your Bluetooth devices and getting them to work with each other? In this week’s Whiteboard Wednesdays video, Scott Jacobson explains how Bluetooth 5 does away with this and other range [More]
Melexis Time-of-Flight (TOF) automotive 3-D image sensor was analyzed with Cadence® Voltus™-Fi Solution to visualize the electro migration on the power line. The sensor features 320×240 pixels resulting in a complex power routing system. During [More]
In this video, Crystle Bruno describes how customers benefit from the 4 values of Cadence Cloud: unsurpassed productivity, intelligent scalability, security you can trust, and flexibility to meet your needs. Find more great content from [More]
Discover how Uhnder created the world’s first digital radar chip, an impossible task without tools from Cadence. “Together we’re going to save millions of lives,” says Manju Hegde, CEO and cofounder of Uhnder. Find more [More]
ARM and Cadence provide an IoT IP Reference Subsystem that shortens IoT testchip development time to as little as 3 months for 3 engineers. See some of the capabilities of an example IoT board that [More]
Cadence talks to Silicon Labs about their latest Wireless Gecko portfolio and how Cadence mixed-signal low power solution helped them solve complex design challenges. For more information on the Cadence solutions, please visit: http://www.cadence.com/solutions/lp/Pages/mixed_signal.aspx http://www.silabs.com/products/wireless/pages/default.aspx
Cadence and Silicon Labs take a quick look at the challenges when designing embedded building blocks like the energy efficient EFM32 Gecko microcontrollers for use in low power Internet of Things applications. Daniel Cooley from [More]
Today’s IoT designs demand some complex mixed-mode, mixed-signal simulation to be sure that they’ll work correctly across wide ranges of component variation, temperature, and other real-world conditions. In this episode of Chalk Talk, Amelia Dalton [More]
ARM and Cadence share the strategy, architecture, benefits of using the IP Reference Subsystem and demo board to help accelerate IoT SoC development. They describe what IP components are integrated on the testchip, what the [More]